Technologist, VLSI Design Engineering

Job responsibilities:

• Hands-on contributions coding C++ & System C models & test creation
• Debug issues in Firmware environment
• Validating the developed model using systemC/SV/UVM testbench
• Debug failures and root-cause it by interacting with other teams/groups Etc.
• The candidate will also have to mentor junior engineers

Experience:

13+ Years of the relevant work experience

- Functional Modeling & Verification:

• Hands-on experience in C++ & System C based Model development/test creation
• Prior Experience with C based Tests/Test bench development
• Python  coding would be a plus
• Knowledge on NAND concepts will be an advantage 
• Knowledge on Memory and Digital Design   Concepts would be preferable
• (SRAM/DRAM/ROM/Flash) Circ...