Technical Lead, Digital Design Subsystems

Technical Lead, Digital Design Subsystems
Location: Bengaluru, Karnataka, India Experience Level: Advanced
Minimum Qualifications
Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
10 years of experience working on multiple SoCs with silicon success.
3 years of experience in RTL coding using Verilog or Systemverilog language.
Experience in design and multi power domains with clocking.
Preferred Qualifications
Experience in high performance design, multi power domains with complex clocking.
Proficient with Verilog or System Verilog language.
Proficient with ASIC design methodologies for front quality checks including Lint, CDC/RDC, synthesis, DFT ATPG/Memory BIST, UPF and low power optimization/estimation.
Proficient with chip design flow and good understanding of cross domain involving Design Verification (DV)/Design for Testability (DFT)/physical design/software.
Proven record of multiple...