SoC Synthesis Engineer: RTL-to-Gate & PPA Optimizer

Qualcomm is seeking a SoC Design & Synthesis Engineer in Tijuana, Baja California. This role is essential for synthesizing large-scale SoC RTL designs into high-quality gate-level netlists, ensuring design efficiency across multiple platforms such as mobile and automotive.

Ideal candidates should have robust experience in ASIC design, with an emphasis on RTL-to-gate synthesis, timing constraints, and optimization techniques. The job offers a dynamic environment where you'll collaborate with various teams to deliver high-performance products.