Soc Bus Verification Engineer — Uvm, Axi/Chi

Link-Worldwide is seeking a verification engineer to develop strategies for SoC Interconnects and build advanced verification environments using SystemVerilog and UVM methodologies.
This full-time role offers extensive benefits, including stock options and a supportive work environment.
Ideal candidates will have in-depth knowledge of ARM AMBA protocols and hands-on experience with industry-standard simulators.
The position also includes a 3-month probationary period.
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