Senior Memory IP Design & Validation Engineer

Join Allegro MicroSystems in Buenos Aires as a Senior IP Engineer, where you will play a critical role in the Design Enablement team. You will design semiconductor device layouts and support the manufacturing requirements for our global design community.

This position requires a BSEE and at least 2 years of industry experience in memory design, circuit verification, and EDA tool usage. Be a part of an innovative team committed to making a real impact on technology.