Senior CPU Design Engineer - RISC-V Verilog RTL

Bitdeer Technologies Group in Singapore is looking for a CPU/Processor Design Engineer to develop Verilog RTL for RISC-V based CPU architectures. Responsibilities include ensuring functional coverage, supporting verification closure, and collaborating with verification and software teams for high-quality processor IP.

The ideal candidate has a Master’s or Bachelor’s degree in Electrical or Computer Engineering, with at least 5 years of semiconductor R&D experience. The role offers a culture that values diversity, an inclusive environment, and opportunities for personal growth and networking.