Principal Verification Architect — DFT for DRAM

Link-Worldwide is seeking a Principal/Senior Design Verification Engineer to lead verification projects for DRAM and Emerging Memory products. The role involves evaluating circuit designs, collaborating globally, and mentoring junior engineers.

The ideal candidate has over 7 years of experience, a BS in Electrical Engineering or related field, and a deep understanding of CMOS and DRAM technology.

Join us to innovate in memory solutions and contribute to the future of information technology.