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SDWAN/Platform Test Engineer ( L2/L3 Protocols| Routing| Python Automation (8-12 yrs))
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View JobASIC Engineering Digital Designer/ Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 8-12 Years | Pune)
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View JobEmbedded Software Engineer - C Program/I2C,UART,SPI,PCIe/BSP/Boot loader - 8 to 12 years - Bangalore
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View JobASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |12-16 years| Pune)
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View JobASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |8-12 years| Pune)
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View JobLeader, Software Engineering | C, C++, BSP, SONiC, Device Driver, Linux, Kernel, People Leader | 12+ years
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