[hw] soc physical design engineer

Responsibilities Perform RTL-to-GDSII Physical Design (Synthesis, Place & Route, Timing Closure) Conduct low-power design and power optimization Run physical verification (DRC, LVS, ERC, etc.) and signal integrity checks (SI, IR Drop, EM analysis) Optimize PPA (Power, Performance, Area); develop and automate Physical Design flows for advanced process technologies Qualifications Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or related field 10+ years of experience in ASIC Physical Design (relevant project experience for new graduates will be considered) Proficiency with EDA tools such as Synopsys or Cadence (Design Compiler, ICC2, Innovus, etc.) Understanding of STA (Static Timing Analysis) and Low Power Design Methodologies In-depth knowledge of DFM (Design For Manufacturing) rules and its application in physical design Strong communication and problem-solving skills Preferred Qualifications Hands‑on experience with 7nm or below advanced process technolog...