Conception de circuit ferroélectrique pour la logique ternaire // Design of Ferroelectric Circuits for Ternary Logic

Topic description

Energy efficiency has become a critical challenge in modern computing, from embedded IoT devices to high-performance supercomputers. Conventional CMOS-based architectures are reaching fundamental limits, including the end of Dennard scaling, rising static power dissipation, and the “memory wall” — data transfers between processor and memory alone account for 70 to 90% of a system's total energy budget. In-Memory Computing (IMC) is emerging as a compelling solution by embedding computation directly within memory arrays, thereby eliminating costly data movements. In this context, ferroelectric field-effect transistors (FeFETs) stand out as particularly attractive devices: they are compatible with standard CMOS fabrication processes, inherently non-volatile, and enable reconfigurable logic gates in which one operand is persistently encoded in the ferroelectric gate stack — a concept already demonstrated at INL.



This PhD thesis is car...